ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux

Show HN: ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux

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ML that runs in production, on the edge, no compromises. I design, train, and deploy models onto edge hardware — from scientific ML and model compression to production inference pipelines. CTO & Co-Founder at Ascalia | buymeacoffee.com/dejanstrbad. Click to read Dejan Strbad on Substack. Launched 4 months ago.

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Website: dstrbad.substack.com/p/building-an-ml-accelerator-from-scratch